Hi ..Please help to evaluate my sop ..It would be a great help if you can help to let me know ur comments asap as Dec 15th is the deadline.Thanks a lot.
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From the invention of transistor in 1947 to the development of 22nm Haswell Microarchitecture processors today, the field of semiconductors has changed the course of human history with its widespread applications ranging from space exploration to bioinformatics. The particular fields of signal processing, communications and networking demand sophisticated algorithms to be implemented on silicon chip. The advancements in the VLSI technology have provided the designers with significant impetus for porting algorithm into architecture. I wish to pursue a research career in the field of Design and Test of high performance VLSI architectures for signal processing, communications and embedded applications through a Master's degree in computer Engineering.
I have always been enthusiastic about machines around me and the physics governing their operation. In my seventh grade, I was introduced to one of the most prominent inventions in human history, the computer. I was intrigued by its massive computational and multitasking abilities which I later came to know were because of the microprocessor, the heart of computer. My mentor suggested me to pursue electronics engineering to complement my interests in computers. A meritorious performance in the All India Engineering Entrance Examination (placed among the top 0.3% in about half a million students) helped me to get admission to the Bachelor of Technology program in the field of Electronics and Communication Engineering at National Institute , an institute that has been consistently ranked among top 10 in the country.
My first research experience was during a project at Electronics Corporation of India Ltd (ECIL), a Defence R&D Company in the summer vacation of my sophomore year. Under the guidance of Dr. Anil Kumar, I developed a generalized remote manual control for Micro Unmanned Aerial Vehicles (MUAV) using open source ARDUINO prototyping platform by interfacing a Sony Playstation Joystick to user PC. My design was highly appreciated and was later deployed for remote surveillance in tough terrains. It fortified my interests in embedded systems and Robotics. These interests together with proactive work nature and dedication made me the General Secretary of Electronics Amateurs and HAM Club, NITW under the aegis of which I organized many workshops in the field of Robotics and Communications for students in their early academic years.
My undergraduate study bolstered my fundamentals of Electronics and Communications. In particular, I developed a strong penchant for the field of VLSI when I was introduced to academic courses such as Digital System Design, Microprocessor systems, VLSI and Digital Signal Processing. The Digital Systems Design Laboratory gave me the opportunity to implement complex designs in hardware at multiple levels of abstraction using VHDL. The ability to synthesize a prototype of a complex ASIC design on a FPGA target device left me spellbound. In order to gain real time exposure in the related fields, I constantly familiarized myself with various articles from Technical conferences. During my pre-final year, I implemented efficient hardware architecture for image compression algorithm using Discrete Cosine Transform technique and successfully synthesized and verified it using XILINX FPGA. These experiences gave me immense satisfaction and further laid a very strong foundation for my steps towards a research career.
Following my pre-final year under-graduation, I was selected for a prestigious scholarship given to those with strong academic and research background. Dr. Kumar, University of XXXX invited me for assistance in their project to implement a novel architecture for H.264 Encoding Video Compression. A reconfigurable hardware implementation on FPGA was considered since it offers high performance similar to ASIC and high flexibility, configurability similar to software. The functionality was verified by implementation using ALTERA CYCLONE II and a fully pipelined design approach led to an increase in throughput with a marginal increase in on-chip gate count. I saw a great potential for me to pursue research in this field which continues to offer challenges such as achieving high performance while simultaneously concentrating on low power and programmability features.
The field of Signal processing has also engaged my interest. As a part of my bachelor's thesis, I worked on "Multiscale Permutation Entropy and Wavelet analysis of Heart Rate Variability (HRV)". I actively contributed to the entropy estimation of HRV which is crucial in early detection, diagnosis and risk stratification of cardiovascular diseases. My analysis helped to identify potential illness among the subjects based on the entropy of HRV signals.
My passion for VLSI led me to a career as Product engineer at XXXX Semiconductors. At XXXX, I was involved in post silicon characterisation, validation and test environment development of PSoC and Multiport SRAMs. With ever growing complex designs, a comprehensive knowledge of ATPG tool and DFT Techniques such as BIST facilitated me to mitigate the higher ATE test costs while simultaneously detecting several types of faults. My initiative for test time reduction using fast converging mathematical algorithms was highly appreciated. A unique opportunity to work at the customer facility of wafer sort, Assembly and Test at the three Taiwan Semiconductor leaders TSMC, ASE, KYEC embodied me with the VLSI Process Technology knowledge and challenges required to integrate and test a device with several millions of transistors. In due course, I developed a strong interest for ARM architecture based SoC solutions in Digital and Mixed signal domain.
In my endeavour to enhance my knowledge in VLSI Systems domain, I went ahead to join YYYYY R&D Institute as a Verification engineer. Sub-system verification of next generation NVM Express based Flash SSD controllers gave me a valuable insight into the design of advanced heterogeneous architectures with lower latency, higher number of IOPS and reduced power consumption. A System Verilog implementation of Transaction Level Modelling in UVM facilitated me to build reusable testbench with several abstract interfaces and ports at multiple levels of design abstraction thereby reducing the chip design cycle time.
In my two and half years of experience in semiconductor industry, I witnessed an exponential increase in design complexity to meet the performance and low power metrics. Design methodologies became increasingly inclined towards manufacturability and testability owing to the process induced variations. These complexities make VLSI Design and Test a fascinating and challenging research area. I believe pursuing Master's degree at University of California would be a crucial step in an effort to quench my thirst of knowledge and contribute to VLSI field by positive research. The extensive academic courses, advanced laboratories, strong research facility, diverse heritage and renowned faculty of the University of California, would provide an ideal platform for my all round development.
The ongoing research work under Prof. Jacob A. Abraham and Prof. Nur A. Touba in the field of VLSI Design, Verification and Test closely matches my research interests and work experience. Dr. Andreas Gerstlauer interests in "Application/Algorithm Co-Design" resemble my research efforts during pre-final year. All these projects which are close to my experiences make me feel that I am a good match for the Master's program. With Masters and subsequent Doctoral studies from University of California, I aspire to pursue an academic career where I can hone my skills through research and achieve my long term goal to build novel semiconductor solutions for the greater benefit of mankind.
I am confident that my strong technical acumen, good intellectual ability, strong motivation and industry work experience will help me to contribute to the ongoing research at University of California. Finally I thank the admission committee for taking time to review my application.
